Termsslug: phy

PHY

物理层

Physical interface layer linking the DRAM controller to memory chips, handling timing tuning and signal integrity.

Curated Intelligence

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Hacker News AIT2·Open Source
38 pts
LiteDRAM Offers Configurable Open Source DRAM Core for FPGAs

LiteDRAM is a small-footprint, configurable DRAM core within the LiteX ecosystem, described in Migen and offering a vendor-agnostic generic SDR PHY with 1:1 or 1:2 frequency ratios validated on Xilinx, Altera and Lattice devices. It can be used as a LiteX library or exported as Verilog RTL, and highlights that DDR3+ interfaces require boot-time PHY tuning.