IT之家 · 智能时代 · 10/9/2026, 08:43:53
Synopsys Seeks China AI Lab Partnerships to Customize EDA Tools and Accelerate Chip Design
Synopsys plans to partner with Chinese LLM developers to create customized AI-assisted chip design tools amid export controls. This follows a multi-year deal with OpenAI to launch the specialized model GPT-Synopsys, aiming to compress full chip design cycles to under one year and boost revenue projections.
SOURCE COVERAGEOriginal coverage
On October 9, according to Nikkei Asia, Synopsys, a leading chip design software company, stated that despite the US government tightening export controls on AI and semiconductors, it plans to collaborate with Chinese large language model (LLM) developers, leveraging the AI versions of its tools to help accelerate chip R&D processes for domestic Chinese enterprises.
On September 30 local time, Synopsys announced a multi-year partnership agreement with OpenAI, under which the two companies will jointly develop a specialized AI model named GPT-Synopsys, aimed at automating chip design workflows and significantly shortening development cycles.
Ravi Subramanian, Chief Product Management Officer at Synopsys, revealed in an interview that the company is exploring partnerships with Chinese AI labs to tailor similar design tools specifically for the Chinese market.
In recent years, Synopsys has faced considerable pressure. It is widely believed that emerging AI technologies could disrupt and potentially replace EDA software, the foundation of its business. However, during its annual Investor Day event held on September 30, Synopsys projected that revenue would grow by 15% year-over-year in fiscal year 2027, reaching $11.15 billion (approximately 74.875 billion RMB based on current exchange rates, as noted by IT Home), attributing this growth to the deep integration of AI technology into its own tools.
Subramanian pointed out that with the surging demand for AI model training and inference deployment, the pace of iterating chips toward higher performance has accelerated significantly. Chip manufacturers urgently need next-generation AI-enabled design tools, such as those co-developed by Synopsys and OpenAI, to keep up with market demands.
We are seeing the iteration cycle of chip R&D accelerating sharply, meaning the complete design process for a chip must be compressed to less than one year... At the same time, the number of chip projects in design is also increasing day by day.