量子位官网T2·68 pts
- Paimon-0 ranks first in four key embodied benchmarks, surpassing GPT-6 Astra in general manipulation
- FPGA hardware mode reduces worst-case EtherCAT control cycle jitter from 30 microseconds to 152 nanoseconds
- The company aims to solve end-to-end latency bottlenecks by delivering custom embodied AI chips in 2028