Termsslug: d-imc

D-IMC

数字存内计算

Axelera's digital in-memory computing architecture that computes within memory arrays to cut data movement.

Curated Intelligence

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IT之家 · 智能时代T2·Infra
78 pts
Axelera Unveils Titania Data Center AIPU Architecture for 2027

Dutch chip startup Axelera AI has disclosed the architecture of Titania, its third-generation AIPU targeting data center inference, with mass production slated for Q3 2027 and over $300 million in orders already booked. Optimized for sparse MoE models, the chip delivers 2.5 PFLOPS at FP8, and a single 4U eight-card server can run a 1.6T MoE model locally, with the company claiming 7x per-watt throughput versus current data center servers.