IT之家 · IT业界T2·78 pts
- HBC uses vertically stacked multi-layer LPDDR with TSV interconnects, reducing data transfer distance to microns.
- The AI250 accelerator is expected to deliver 133 TB/s effective memory bandwidth, an 18x improvement over predecessors.
- Early samples achieved >5x per-watt bandwidth compared to HBM4, with formal products targeting 6x traditional HBM efficiency.