qwenGPU Embeds a SIMT CUDA Core Inside Qwen3.5 Weights

1 reports archived1 independent sourcesupdated 11/2/2026, 15:32:08

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Developer project qwenGPU compiles a 45-layer SIMT architecture directly into Qwen3.5-2B weights, enabling the model to execute real CUDA instructions internally. By repurposing Gated DeltaNet states as memory, it achieves high kernel fidelity on Tesla T4 hardware despite slower inference speeds and minor text drift.

LATEST/Developer project qwenGPU compiles a 45-layer SIMT architecture directly into Qwen3.5-2B weights, enabling the model to execute real CUDA instructions internally. By repurposing Gated DeltaNet states as memory, it achieves high kernel fidelity on Tesla T4 hardware despite slower inference speeds and minor text drift.

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Marktechpost (@Marktechpost)T2Nov 2, 15:32·78 pts
qwenGPU Embeds a SIMT CUDA Core Inside Qwen3.5 Weights
- qwenGPU inserts 45 untrained layers before Qwen3.5-2B to simulate SIMT GPU behavior
- Repurposes Gated DeltaNet gating states as carriers for registers, ROM, and global memory
- Reference interpreter matches real Tesla T4 on 49/49 kernels but runs at only 10-15 tokens/s on Apple MPS
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