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AI CLUSTERED EVENT · 10/14/2026

MemSilicon Tapes Out First 1T4R Architecture 1Gb RRAM Chip: Breaking High-Density Compute-in-Memory Bottlenecks with CMOS Compatibility

1 reports archived1 independent sourcesupdated 10/14/2026, 14:24:00
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MemSilicon has completed the tape-out of 'MountTai 2026', its first high-density, large-capacity RRAM chip based on the 1TnR technology route. Utilizing a 28nm CMOS process and 1T4R cell structure, the chip achieves 1Gb capacity, 30Mb/mm² density, and sub-20ns access latency by sharing selection transistors among multiple resistive switching units. Currently undergoing verification, it aims to provide energy-efficient embedded non-volatile storage solutions for edge inference scenarios like embodied AI and AI PCs.

LATEST/MemSilicon has completed the tape-out of 'MountTai 2026', its first high-density, large-capacity RRAM chip based on the 1TnR technology route. Utilizing a 28nm CMOS process and 1T4R cell structure, the chip achieves 1Gb capacity, 30Mb/mm² density, and sub-20ns access latency by sharing selection transistors among multiple resistive switching units. Currently undergoing verification, it aims to provide energy-efficient embedded non-volatile storage solutions for edge inference scenarios like embodied AI and AI PCs.

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Total 1 reports · Latest first
  1. 量子位官网T2·68 pts
    • 'MountTai 2026' is the world's first 1Gb high-density RRAM chip based on the 1T4R structure, achieving synergistic breakthroughs in density, capacity, and cost.
    • It utilizes a back-end integration method compatible with standard 28nm CMOS processes, enabling mass production without altering mainstream wafer fab lines.
    • Provides low-latency (<20ns), highly integrated embedded non-volatile storage solutions for high-performance SoCs, embodied AI, and AI PCs.
MemSilicon Tapes Out First 1T4R Architecture 1Gb RRAM Chip: Breaking High-Density Compute-in-Memory Bottlenecks with CMOS Compatibility | Today for AI