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AI CLUSTERED EVENT · 10/13/2026

SK Hynix Unveils H-TPU Architecture for SSDs: Splits Control Functions into Micro-Clusters to Cut Power to 2.5% of Traditional CPUs

1 reports archived1 independent sourcesupdated 10/13/2026, 09:15:13
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SK Hynix introduced the H-TPU, an ultra-lightweight transaction processing unit for SSD controllers that replaces general-purpose CPUs with distributed micro-core clusters, reducing area and power consumption to 1/25th and 2.5% respectively. Designed to address storage bottlenecks in AI data centers, this architecture will be deployed in next-gen enterprise SSDs and the 'Storage Next' framework, synergizing with High Bandwidth Flash (HBF).

LATEST/SK Hynix introduced the H-TPU, an ultra-lightweight transaction processing unit for SSD controllers that replaces general-purpose CPUs with distributed micro-core clusters, reducing area and power consumption to 1/25th and 2.5% respectively. Designed to address storage bottlenecks in AI data centers, this architecture will be deployed in next-gen enterprise SSDs and the 'Storage Next' framework, synergizing with High Bandwidth Flash (HBF).

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Total 1 reports · Latest first
  1. IT之家 · 智能时代T2·68 pts
    • H-TPU is not an AI tensor accelerator but a programmable processor dedicated to controlling SSD data planes and handling transactions.
    • It employs a simplified four-stage pipeline, eliminating superscalar and out-of-order execution units to maximize energy efficiency.
    • Modular on-demand activation ensures only task-specific functional modules operate, significantly reducing overall controller power consumption.