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AI CURATED HOT STORY · 10/31/2026

CXMT Completes Engineering Validation of 4F² DRAM Platform

1 reports archived1 independent sourcesupdated 10/31/2026, 20:26:18
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1 Sources Cross-Validated

CXMT announced that its sixth-generation DRAM technology platform based on the 4F² vertical channel architecture has completed engineering sample validation, with first DDR5 RDIMM samples expected by year-end. The platform utilizes logic-memory wafer bonding and proprietary VSG transistors to significantly enhance storage density and enable further scaling, targeting high-density server applications.

LATEST/CXMT announced that its sixth-generation DRAM technology platform based on the 4F² vertical channel architecture has completed engineering sample validation, with first DDR5 RDIMM samples expected by year-end. The platform utilizes logic-memory wafer bonding and proprietary VSG transistors to significantly enhance storage density and enable further scaling, targeting high-density server applications.

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Coverage timeline

Total 1 reports · Latest first
  1. IT之家 · IT业界T2·68 pts
    • Sixth-gen platform (based on 4F² architecture) passed engineering validation; first DDR5 RDIMM samples expected by year-end.
    • Utilizes logic-memory wafer bonding and proprietary VSG transistors to boost density and enable future scaling.
    • Fifth-gen platform mass-produced LPDDR5X/LPDDR6, achieving at least 50% higher die yield per wafer than previous gen.